| commit | d83d350cb2f9edbdb4eccc6454c82202a09483c8 | |
| author | Benjamin Gray <bgray@linux.ibm.com> | |
| Wed, 27 Dec 2023 13:46:50 +0000 (27 23:46 +1000) | ||
| committer | Nicholas Piggin <npiggin@gmail.com> | |
| Tue, 12 Mar 2024 16:47:04 +0000 (13 02:47 +1000) | ||
| tree | ba603336fe8dcf4c8f6c367addadd81790863be8 | treesnapshot (tar.gz zip) |
| parent | 8b0e3fb835511fe65cfb0df79fc17df2fede4805 | commitdiff |
ppc/spapr: Add pa-features for POWER10 machines
Add POWER10 pa-features entry.
Notably DEXCR and [P]HASHST/[P]HASHCHK instruction support is
advertised. Each DEXCR aspect is allocated a bit in the device tree,
using the 68--71 byte range (inclusive). The functionality of the
[P]HASHST/[P]HASHCHK instructions is separately declared in byte 72,
bit 0 (BE).
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Benjamin Gray <bgray@linux.ibm.com>
[npiggin: reword title and changelog, adjust a few bits]
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Add POWER10 pa-features entry.
Notably DEXCR and [P]HASHST/[P]HASHCHK instruction support is
advertised. Each DEXCR aspect is allocated a bit in the device tree,
using the 68--71 byte range (inclusive). The functionality of the
[P]HASHST/[P]HASHCHK instructions is separately declared in byte 72,
bit 0 (BE).
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Benjamin Gray <bgray@linux.ibm.com>
[npiggin: reword title and changelog, adjust a few bits]
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
| hw/ppc/spapr.c | diffblobblamehistory |