target-arm/translate-a64.c: Unify some of the ldst_reg decoding
commitcd694521ca061a5d0436d5df4ec8c17c8f4dfcdb
authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Thu, 12 May 2016 12:22:27 +0000 (12 13:22 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 12 May 2016 12:22:27 +0000 (12 13:22 +0100)
treeaf8fbb0c312b258e2030a03a58112a43a8f4df88
parent026a19c3128678d4fe301fc36e8ffacdc9ecccb8
target-arm/translate-a64.c: Unify some of the ldst_reg decoding

The various load/store variants under disas_ldst_reg can all reuse the
same decoding for opc, size, rt and is_vector.

This patch unifies the decoding in preparation for generating
instruction syndromes for data aborts.
This will allow us to reduce the number of places to hook in updates
to the load/store state needed to generate the insn syndromes.

No functional change.

Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1461931684-1867-7-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/translate-a64.c