| commit | cd1e4db73646006039f25879af3bff55b2295ff3 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Tue, 22 Aug 2023 16:31:14 +0000 (22 17:31 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 22 Aug 2023 16:31:14 +0000 (22 17:31 +0100) | ||
| tree | 9a1eab0f9cf5da24f6e1ab42f05a2854f569d99e | treesnapshot (tar.gz zip) |
| parent | 4b3520fd93cd49cc56dfcab45d90735cc2e35af7 | commitdiff |
target/arm: Fix 64-bit SSRA
Typo applied byte-wise shift instead of double-word shift.
Cc: qemu-stable@nongnu.org
Fixes: 631e565450c ("target/arm: Create gen_gvec_[us]sra")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1737
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230821022025.397682-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Typo applied byte-wise shift instead of double-word shift.
Cc: qemu-stable@nongnu.org
Fixes: 631e565450c ("target/arm: Create gen_gvec_[us]sra")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1737
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230821022025.397682-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/tcg/translate.c | diffblobblamehistory |