target/riscv: add zicbop extension flag
commitcc2bf69a36e05e22a1dca9bf6305ef5e0cad993e
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Mon, 18 Dec 2023 12:53:13 +0000 (18 09:53 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 10 Jan 2024 08:47:47 +0000 (10 18:47 +1000)
tree3ff225d5214f6a84608f14dd6cdc90fb87bbac9e
parentd379c748a30dce4bc6114111a5d6c0acec9c05a7
target/riscv: add zicbop extension flag

QEMU already implements zicbom (Cache Block Management Operations) and
zicboz (Cache Block Zero Operations). Commit 59cb29d6a5 ("target/riscv:
add Zicbop cbo.prefetch{i, r, m} placeholder") added placeholders for
what would be the instructions for zicbop (Cache Block Prefetch
Operations), which are now no-ops.

The RVA22U64 profile mandates zicbop, which means that applications that
run with this profile might expect zicbop to be present in the riscv,isa
DT and might behave badly if it's absent.

Adding zicbop as an extension will make our future RVA22U64
implementation more in line with what userspace expects and, if/when
cache block prefetch operations became relevant to QEMU, we already have
the extension flag to turn then on/off as needed.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231218125334.37184-6-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/virt.c
target/riscv/cpu.c
target/riscv/cpu_cfg.h