| commit | c4b2c40c0eea3bc8ad286a6a1a62209c4bc332e3 | |
| author | Greg Kurz <groug@kaod.org> | |
| Fri, 13 Dec 2019 12:00:13 +0000 (13 13:00 +0100) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Mon, 16 Dec 2019 23:59:11 +0000 (17 10:59 +1100) | ||
| tree | 3fbf96685d27fcf41f90c33d1700006fce941070 | treesnapshot (tar.gz zip) |
| parent | 85913070a6c9fcbe1ac6a043f3278b2982702143 | commitdiff |
ppc/pnv: Introduce PnvChipClass::xscom_core_base() method
The pnv_chip_core_realize() function configures the XSCOM MMIO subregion
for each core of a single chip. The base address of the subregion depends
on the CPU type. Its computation is currently open-code using the
pnv_chip_is_powerXX() helpers. This can be achieved with QOM. Introduce
a method for this in the base chip class and implement it in child classes.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157623841311.360005.4705705734873339545.stgit@bahia.lan>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
The pnv_chip_core_realize() function configures the XSCOM MMIO subregion
for each core of a single chip. The base address of the subregion depends
on the CPU type. Its computation is currently open-code using the
pnv_chip_is_powerXX() helpers. This can be achieved with QOM. Introduce
a method for this in the base chip class and implement it in child classes.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157623841311.360005.4705705734873339545.stgit@bahia.lan>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| hw/ppc/pnv.c | diffblobblamehistory | |
| include/hw/ppc/pnv.h | diffblobblamehistory |