| commit | c1ad0b892ce20cf2b5e619c79e8a0c4c66b235dc | |
| author | Greg Kurz <groug@kaod.org> | |
| Wed, 4 Dec 2019 19:43:48 +0000 (4 20:43 +0100) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Mon, 16 Dec 2019 23:39:48 +0000 (17 10:39 +1100) | ||
| tree | b9f1a7ce3e3aeb3efb304d70e061645fcb8944d2 | treesnapshot (tar.gz zip) |
| parent | 4febcdd88f08422a66a1aa0dc55e1472abed3c4b | commitdiff |
ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models
The power7_set_irq() and power9_set_irq() functions set this but it is
never used actually. Modern Book3s compatible CPUs are only supported
by the pnv and spapr machines. They have an interrupt controller, XICS
for POWER7/8 and XIVE for POWER9, whose models don't require to track
IRQ input states at the CPU level.
Drop these lines to avoid confusion.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157548862861.3650476.16622818876928044450.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
The power7_set_irq() and power9_set_irq() functions set this but it is
never used actually. Modern Book3s compatible CPUs are only supported
by the pnv and spapr machines. They have an interrupt controller, XICS
for POWER7/8 and XIVE for POWER9, whose models don't require to track
IRQ input states at the CPU level.
Drop these lines to avoid confusion.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157548862861.3650476.16622818876928044450.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| hw/ppc/ppc.c | diffblobblamehistory | |
| target/ppc/cpu.h | diffblobblamehistory |