| commit | bf5523773eac7a17cf6f6a062b3311a09063881f | |
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Wed, 16 Dec 2020 11:23:38 +0000 (16 12:23 +0100) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Thu, 14 Jan 2021 16:13:53 +0000 (14 17:13 +0100) | ||
| tree | 23b1b22e51ec6d008e26041523c8567bb81d5f61 | treesnapshot (tar.gz zip) |
| parent | 737cca57d3f3a2dd10ef397a33a97de619a5456a | commitdiff |
target/mips/mips-defs: Reorder CPU_MIPS5 definition
Move CPU_MIPS5 after CPU_MIPS4 :)
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-3-f4bug@amsat.org>
Move CPU_MIPS5 after CPU_MIPS4 :)
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-3-f4bug@amsat.org>
| target/mips/mips-defs.h | diffblobblamehistory |