| commit | be8b49de2491145a7aad3201803327b6f568cbd3 | |
| author | David Hildenbrand <david@redhat.com> | |
| Thu, 1 Mar 2018 12:08:26 +0000 (1 13:08 +0100) | ||
| committer | Cornelia Huck <cohuck@redhat.com> | |
| Thu, 1 Mar 2018 12:23:09 +0000 (1 13:23 +0100) | ||
| tree | bcf7c25e20bafa952ce6541552112a9cba1ef664 | treesnapshot (tar.gz zip) |
| parent | eae9f29130f3ed40ad77f40a3bae4b9ebff28907 | commitdiff |
s390x/tcg: fix loading 31bit PSWs with the highest bit set
Let's also put the 31-bit hack in front of the REAL MMU, otherwise right
now we get errors when loading a PSW where the highest bit is set (e.g.
via s390-netboot.img). The highest bit is not masked away, therefore we
inject addressing exceptions into the guest.
The proper fix will later be to do all address wrapping before accessing
the MMU - so we won't get any "wrong" entries in there (which makes
flushing also easier). But that will require more work (wrapping in
load_psw, wrapping when incrementing the PC, wrapping every memory
access).
This fixes the tests/pxe-test test.
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20180301120826.6847-1-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Let's also put the 31-bit hack in front of the REAL MMU, otherwise right
now we get errors when loading a PSW where the highest bit is set (e.g.
via s390-netboot.img). The highest bit is not masked away, therefore we
inject addressing exceptions into the guest.
The proper fix will later be to do all address wrapping before accessing
the MMU - so we won't get any "wrong" entries in there (which makes
flushing also easier). But that will require more work (wrapping in
load_psw, wrapping when incrementing the PC, wrapping every memory
access).
This fixes the tests/pxe-test test.
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20180301120826.6847-1-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| target/s390x/excp_helper.c | diffblobblamehistory |