| commit | be3a8c53b4f18bcc51a462d977cc61a0f46ebb1c | |
| author | Yongbok Kim <yongbok.kim@imgtec.com> | |
| Mon, 1 Jun 2015 11:13:22 +0000 (1 12:13 +0100) | ||
| committer | Leon Alrae <leon.alrae@imgtec.com> | |
| Thu, 11 Jun 2015 09:13:28 +0000 (11 10:13 +0100) | ||
| tree | 505c13b36909eb0e784269a4d929ad3722fbe6ea | treesnapshot (tar.gz zip) |
| parent | 71c199c81d290b2077ee7cf5400332a342de3a97 | commitdiff |
target-mips: Misaligned memory accesses for R6
Release 6 requires misaligned memory access support for all ordinary memory
access instructions (for example, LW/SW, LWC1/SWC1).
However misaligned support is not provided for certain special memory accesses
such as atomics (for example, LL/SC).
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Release 6 requires misaligned memory access support for all ordinary memory
access instructions (for example, LW/SW, LWC1/SWC1).
However misaligned support is not provided for certain special memory accesses
such as atomics (for example, LL/SC).
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
| target-mips/translate.c | diffblobblamehistory | |
| target-mips/translate_init.c | diffblobblamehistory |