| commit | bae4b15aa4fa56815e08cee395486a1c990caa99 | |
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Wed, 16 Dec 2020 11:29:34 +0000 (16 12:29 +0100) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Thu, 14 Jan 2021 16:13:53 +0000 (14 17:13 +0100) | ||
| tree | 033cf0b6fee7c87149be4045ae19087074e2007b | treesnapshot (tar.gz zip) |
| parent | 7a47bae586865498ac55531141d9c3d4d9e3ff83 | commitdiff |
target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3
The MIPS ISA release 3 is common to 32/64-bit CPUs.
To avoid holes in the insn_flags type, update the
definition with the next available bit.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-14-f4bug@amsat.org>
The MIPS ISA release 3 is common to 32/64-bit CPUs.
To avoid holes in the insn_flags type, update the
definition with the next available bit.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-14-f4bug@amsat.org>
| target/mips/mips-defs.h | diffblobblamehistory |