target/arm: add MMU stage 1 for Secure EL2
commitb6ad6062f1e55bd5b9407ce89e55e3a08b83827c
authorRémi Denis-Courmont <remi.denis.courmont@huawei.com>
Tue, 12 Jan 2021 10:45:00 +0000 (12 12:45 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 19 Jan 2021 14:38:51 +0000 (19 14:38 +0000)
treed15eeb1e9e455c1cf82c80cde7e62267237b5a9a
parent6c85f906261226e87211506bd9f787fd48a09f17
target/arm: add MMU stage 1 for Secure EL2

This adds the MMU indices for EL2 stage 1 in secure state.

To keep code contained, which is largelly identical between secure and
non-secure modes, the MMU indices are reassigned. The new assignments
provide a systematic pattern with a non-secure bit.

Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210112104511.36576-8-remi.denis.courmont@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu-param.h
target/arm/cpu.h
target/arm/helper.c
target/arm/internals.h
target/arm/translate-a64.c