target/riscv: rvv-1.0: Add Zve64f extension into RISC-V
commitb4a99d40276eb5bdfa849cc04344d9a2c4c820ef
authorFrank Chang <frank.chang@sifive.com>
Tue, 18 Jan 2022 01:45:04 +0000 (18 09:45 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 21 Jan 2022 05:52:56 +0000 (21 15:52 +1000)
tree45290e7550b604833a5a8a001240ef51f6d36c4e
parent22599b795c8395fa3e2a90c3b32ca1622035feeb
target/riscv: rvv-1.0: Add Zve64f extension into RISC-V

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220118014522.13613-2-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/translate.c