target-mips: fix broken snapshotting
commitb40a1530f294b5fa4479dc3ca9bf46c269d08d87
authorLeon Alrae <leon.alrae@imgtec.com>
Mon, 26 Jan 2015 16:49:42 +0000 (26 16:49 +0000)
committerLeon Alrae <leon.alrae@imgtec.com>
Fri, 13 Feb 2015 14:11:29 +0000 (13 14:11 +0000)
treef842c8f6bf2175755db820631fd3214df3c0c59f
parentd3b1979d7b37c7fa6b187442e0990afa6f88fe3b
target-mips: fix broken snapshotting

Recently added CP0.BadInstr and CP0.BadInstrP registers ended up in cpu_load()
under different offset than in cpu_save(). These and all registers between were
incorrectly restored.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
target-mips/machine.c