| commit | b2e22477166a7f8a32b95317dea747f8af7a807f | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Tue, 11 Dec 2018 22:38:17 +0000 (11 23:38 +0100) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Thu, 20 Dec 2018 22:40:35 +0000 (21 09:40 +1100) | ||
| tree | 2dccda6a2d599c49b90b09ecf7414d30321d546c | treesnapshot (tar.gz zip) |
| parent | 1c53b06c0309104f30ca2c5e1d1e89ddc38de080 | commitdiff |
spapr: add a 'reset' method to the sPAPR IRQ backend
For the time being, the XIVE reset handler updates the OS CAM line of
the vCPU as it is done under a real hypervisor when a vCPU is
scheduled to run on a HW thread. This will let the XIVE presenter
engine find a match among the NVTs dispatched on the HW threads.
This handler will become even more useful when we introduce the
machine supporting both interrupt modes, XIVE and XICS. In this
machine, the interrupt mode is chosen by the CAS negotiation process
and activated after a reset.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[dwg: Fix style nits]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
For the time being, the XIVE reset handler updates the OS CAM line of
the vCPU as it is done under a real hypervisor when a vCPU is
scheduled to run on a HW thread. This will let the XIVE presenter
engine find a match among the NVTs dispatched on the HW threads.
This handler will become even more useful when we introduce the
machine supporting both interrupt modes, XIVE and XICS. In this
machine, the interrupt mode is chosen by the CAS negotiation process
and activated after a reset.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[dwg: Fix style nits]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>