| commit | b2123a48566ab0636b78dda6b9c37c54bff69e6b | |
| author | Rob Herring <rob.herring@calxeda.com> | |
| Thu, 29 Dec 2011 06:19:54 +0000 (29 06:19 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Wed, 4 Jan 2012 13:41:42 +0000 (4 13:41 +0000) | ||
| tree | fd19ff5b26f480bc9a21fc6bf6a046e1af15390b | treesnapshot (tar.gz zip) |
| parent | b79f22656f47f0f8b4b89f096f5ae67d0cf268eb | commitdiff |
add L2x0/PL310 cache controller device
This is just a dummy device for ARM L2 cache controllers, based on the
pl310. The cache type parameter can be defined by a property value
and has a meaningful default.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
[Peter Maydell: removed stray blank line at end]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This is just a dummy device for ARM L2 cache controllers, based on the
pl310. The cache type parameter can be defined by a property value
and has a meaningful default.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
[Peter Maydell: removed stray blank line at end]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| Makefile.target | diffblobblamehistory | |
| hw/arm_l2x0.c | [new file with mode: 0644] | blob |