| commit | ac57622985220de064059971f9ccb00905e9bd04 | |
| author | Bill Paul <wpaul@windriver.com> | |
| Mon, 9 Mar 2015 22:48:01 +0000 (9 15:48 -0700) | ||
| committer | Paolo Bonzini <pbonzini@redhat.com> | |
| Tue, 10 Mar 2015 10:18:24 +0000 (10 11:18 +0100) | ||
| tree | 0a50e0158c2c9b073881b8d2661ee90384bb8143 | treesnapshot (tar.gz zip) |
| parent | ae071cc851d7150d3a9950c642570830bb85729e | commitdiff |
x86: fix SS selector in SYSRET
According to my reading of the Intel documentation, the SYSRET instruction
is supposed to force the RPL bits of the %ss register to 3 when returning
to user mode. The actual sequence is:
SS.Selector <-- (IA32_STAR[63:48]+8) OR 3; (* RPL forced to 3 *)
However, the code in helper_sysret() leaves them at 0 (in other words, the "OR
3" part of the above sequence is missing). It does set the privilege level
bits of %cs correctly though.
This has caused me trouble with some of my VxWorks development: code that runs
okay on real hardware will crash on QEMU, unless I apply the patch below.
Signed-off-by: Bill Paul <wpaul@windriver.com>
Message-Id: <201503091548.01462.wpaul@windriver.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
According to my reading of the Intel documentation, the SYSRET instruction
is supposed to force the RPL bits of the %ss register to 3 when returning
to user mode. The actual sequence is:
SS.Selector <-- (IA32_STAR[63:48]+8) OR 3; (* RPL forced to 3 *)
However, the code in helper_sysret() leaves them at 0 (in other words, the "OR
3" part of the above sequence is missing). It does set the privilege level
bits of %cs correctly though.
This has caused me trouble with some of my VxWorks development: code that runs
okay on real hardware will crash on QEMU, unless I apply the patch below.
Signed-off-by: Bill Paul <wpaul@windriver.com>
Message-Id: <201503091548.01462.wpaul@windriver.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| target-i386/seg_helper.c | diffblobblamehistory |