| commit | a6bc80f7b11188d86010a2d511498fba2fe4b629 | |
| author | Marcin Nowakowski <marcin.nowakowski@fungible.com> | |
| Wed, 26 May 2021 09:35:06 +0000 (26 11:35 +0200) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Sat, 11 Jun 2022 09:34:12 +0000 (11 11:34 +0200) | ||
| tree | ca4799384de1774e3fbd2c2f9ce477d3b616247d | treesnapshot (tar.gz zip) |
| parent | 30796f556790631c86c733ab06756981be0e1def | commitdiff |
target/mips: Fix WatchHi.M handling
bit 31 (M) of WatchHiN register is a read-only register indicating
whether the next WatchHi register is present. It must not be reset
during user writes to the register.
Signed-off-by: Marcin Nowakowski <marcin.nowakowski@fungible.com>
Reviewed-by: David Daney <david.daney@fungible.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@fungible.com>
Message-Id: <20220511212953.74738-1-philmd@fungible.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
bit 31 (M) of WatchHiN register is a read-only register indicating
whether the next WatchHi register is present. It must not be reset
during user writes to the register.
Signed-off-by: Marcin Nowakowski <marcin.nowakowski@fungible.com>
Reviewed-by: David Daney <david.daney@fungible.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@fungible.com>
Message-Id: <20220511212953.74738-1-philmd@fungible.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
| target/mips/cpu.c | diffblobblamehistory | |
| target/mips/cpu.h | diffblobblamehistory | |
| target/mips/tcg/sysemu/cp0_helper.c | diffblobblamehistory |