| commit | a617953855b65a602d36364b9643f7e5bc31288e | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 14 Feb 2020 17:51:03 +0000 (14 17:51 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 21 Feb 2020 16:07:01 +0000 (21 16:07 +0000) | ||
| tree | 9b8ef04fc4e905cbfc69a549722b15795e79e37a | treesnapshot (tar.gz zip) |
| parent | d52c061e541982a3663ad5c65bd3b518dbe85b87 | commitdiff |
target/arm: Define an aa32_pmu_8_1 isar feature test function
Instead of open-coding a check on the ID_DFR0 PerfMon ID register
field, create a standardly-named isar_feature for "does AArch32 have
a v8.1 PMUv3" and use it.
This entails moving the id_dfr0 field into the ARMISARegisters struct.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200214175116.9164-9-peter.maydell@linaro.org
Instead of open-coding a check on the ID_DFR0 PerfMon ID register
field, create a standardly-named isar_feature for "does AArch32 have
a v8.1 PMUv3" and use it.
This entails moving the id_dfr0 field into the ARMISARegisters struct.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200214175116.9164-9-peter.maydell@linaro.org
| hw/intc/armv7m_nvic.c | diffblobblamehistory | |
| target/arm/cpu.c | diffblobblamehistory | |
| target/arm/cpu.h | diffblobblamehistory | |
| target/arm/cpu64.c | diffblobblamehistory | |
| target/arm/helper.c | diffblobblamehistory |