target/arm: Permit T32 LDM with single register
commita530e470ea4f70d1207ef62273e43a7d178f53ac
authorPeter Maydell <peter.maydell@linaro.org>
Wed, 27 Sep 2023 10:18:53 +0000 (27 11:18 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 19 Oct 2023 13:32:13 +0000 (19 14:32 +0100)
tree21ff2092b1de71c7460948d7166c30de23804d22
parent40d45b85e045501a3d3d3301f8554ff30adef3ee
target/arm: Permit T32 LDM with single register

For the Thumb T32 encoding of LDM, if only a single register is
specified in the register list this instruction is UNPREDICTABLE,
with the following choices:
 * instruction UNDEFs
 * instruction is a NOP
 * instruction loads a single register
 * instruction loads an unspecified set of registers

Currently we choose to UNDEF (a behaviour chosen in commit
4b222545dbf30 in 2019; previously we treated it as "load the
specified single register").

Unfortunately there is real world code out there (which shipped in at
least Android 11, 12 and 13) which incorrectly uses this
UNPREDICTABLE insn on the assumption that it does a single register
load, which is (presumably) what it happens to do on real hardware,
and is also what it does on the equivalent A32 encoding.

Revert to the pre-4b222545dbf30 behaviour of not UNDEFing
for this T32 encoding.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1799
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230927101853.39288-1-peter.maydell@linaro.org
target/arm/tcg/translate.c