target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree
commita4e143ac5b9185f670d2f17ee9cc1a430047cb65
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 30 Apr 2020 18:09:41 +0000 (30 19:09 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 4 May 2020 11:57:56 +0000 (4 12:57 +0100)
tree5ba4cd90c6f57333ec6dff096c0f64bc175a4da5
parent123ce4e3daba26b760b472687e1fb1ad82cf1993
target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree

Convert the Neon 3-reg-same VADD and VSUB insns to decodetree.

Note that we don't need the neon_3r_sizes[op] check here because all
size values are OK for VADD and VSUB; we'll add this when we convert
the first insn that has size restrictions.

For this we need one of the GVecGen*Fn typedefs currently in
translate-a64.h; move them all to translate.h as a block so they
are visible to the 32-bit decoder.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200430181003.21682-15-peter.maydell@linaro.org
target/arm/neon-dp.decode
target/arm/translate-a64.h
target/arm/translate-neon.inc.c
target/arm/translate.c
target/arm/translate.h