| commit | a300c04f136a70c507e6f481b028363c879d16e5 | |
| author | AlexChen <alex.chen@huawei.com> | |
| Tue, 3 Nov 2020 09:32:01 +0000 (3 17:32 +0800) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Tue, 3 Nov 2020 15:51:13 +0000 (3 16:51 +0100) | ||
| tree | c3a159050df7d1409ea5a4beca58116a728d1307 | treesnapshot (tar.gz zip) |
| parent | 4a129ccdf25f920788a953df1ccc0e485f7b977c | commitdiff |
hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/write
According to the loongson spec
(http://www.loongson.cn/uploadfile/cpu/3B1500/Loongson_3B1500_cpu_user_1.pdf)
and the macro definition(#define R_PERCORE_ISR(x) (0x40 + 0x8 * x)), we know
that the ISR size per CORE is 8, so here we need to divide
(addr - R_PERCORE_ISR(0)) by 8, not 4.
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Alex Chen <alex.chen@huawei.com>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <5FA12391.8090400@huawei.com>
[PMD: Shortened subject]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
According to the loongson spec
(http://www.loongson.cn/uploadfile/cpu/3B1500/Loongson_3B1500_cpu_user_1.pdf)
and the macro definition(#define R_PERCORE_ISR(x) (0x40 + 0x8 * x)), we know
that the ISR size per CORE is 8, so here we need to divide
(addr - R_PERCORE_ISR(0)) by 8, not 4.
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Alex Chen <alex.chen@huawei.com>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <5FA12391.8090400@huawei.com>
[PMD: Shortened subject]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
| hw/intc/loongson_liointc.c | diffblobblamehistory |