| commit | a26fc6f5152b47f1d7ed928f9c9d462d01ff1624 | |
| author | Tony Nguyen <tony.nguyen@bt.com> | |
| Fri, 23 Aug 2019 18:36:56 +0000 (24 04:36 +1000) | ||
| committer | Richard Henderson <richard.henderson@linaro.org> | |
| Tue, 3 Sep 2019 15:30:39 +0000 (3 08:30 -0700) | ||
| tree | c7ef59b7146b37a2baf70e2af17a0e0d6d406a8c | treesnapshot (tar.gz zip) |
| parent | 9bf825bf3df4ebae3af51566c8088e3f1249a910 | commitdiff |
cputlb: Byte swap memory transaction attribute
Notice new attribute, byte swap, and force the transaction through the
memory slow path.
Required by architectures that can invert endianness of memory
transaction, e.g. SPARC64 has the Invert Endian TTE bit.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <2a10a1f1c00a894af1212c8f68ef09c2966023c1.1566466906.git.tony.nguyen@bt.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Notice new attribute, byte swap, and force the transaction through the
memory slow path.
Required by architectures that can invert endianness of memory
transaction, e.g. SPARC64 has the Invert Endian TTE bit.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <2a10a1f1c00a894af1212c8f68ef09c2966023c1.1566466906.git.tony.nguyen@bt.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| accel/tcg/cputlb.c | diffblobblamehistory | |
| include/exec/memattrs.h | diffblobblamehistory |