| commit | a21d89b5f4084d8b739d81149e777522f1120e08 | |
| author | Nicholas Piggin <npiggin@gmail.com> | |
| Sun, 28 May 2023 09:53:05 +0000 (28 19:53 +1000) | ||
| committer | Nicholas Piggin <npiggin@gmail.com> | |
| Fri, 23 Feb 2024 13:24:43 +0000 (23 23:24 +1000) | ||
| tree | 6586ba4febac2f0cd208384299e99c0c1604481e | treesnapshot (tar.gz zip) |
| parent | d8c14411d0bb5f3d5370e74f8e993eb4eb63c55a | commitdiff |
target/ppc: Add SMT support to time facilities
The TB, VTB, PURR, HDEC SPRs are per-LPAR registers, and the TFMR is a
per-core register. Add the necessary SMT synchronisation and value
sharing.
The TFMR can only drive the timebase state machine via thread 0 of the
core, which is almost certainly not right, but it is enough for skiboot
and certain other proprietary firmware.
Acked-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
The TB, VTB, PURR, HDEC SPRs are per-LPAR registers, and the TFMR is a
per-core register. Add the necessary SMT synchronisation and value
sharing.
The TFMR can only drive the timebase state machine via thread 0 of the
core, which is almost certainly not right, but it is enough for skiboot
and certain other proprietary firmware.
Acked-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
| target/ppc/timebase_helper.c | diffblobblamehistory | |
| target/ppc/translate.c | diffblobblamehistory |