| commit | 9e430ca3da7b9bef4c89f8c72ebc703900f7c6b5 | |
| author | John Arbuckle <programmingkidx@gmail.com> | |
| Sun, 24 Jun 2018 23:12:48 +0000 (24 19:12 -0400) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Mon, 2 Jul 2018 23:56:52 +0000 (3 09:56 +1000) | ||
| tree | 00476bb7b5773a0e5a5ae15382776013a55b5433 | treesnapshot (tar.gz zip) |
| parent | 7fbc2b20d2e0ca1898bfc2bd871fb674ec1039fb | commitdiff |
fpu_helper.c: fix setting FPSCR[FI] bit
The FPSCR[FI] bit indicates if the last floating point instruction had a result that was rounded. Each consecutive floating point instruction is suppose to set this bit to the correct value. What currently happens is this bit is not set as often as it should be. I have verified that this is the behavior of a real PowerPC 950. This patch fixes that problem by deciding to set this bit after each floating point instruction.
https://www.pdfdrive.net/powerpc-microprocessor-family-the-programming-environments-for-32-e3087633.html
Page 63 in table 2-4 is where the description of this bit can be found.
Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
The FPSCR[FI] bit indicates if the last floating point instruction had a result that was rounded. Each consecutive floating point instruction is suppose to set this bit to the correct value. What currently happens is this bit is not set as often as it should be. I have verified that this is the behavior of a real PowerPC 950. This patch fixes that problem by deciding to set this bit after each floating point instruction.
https://www.pdfdrive.net/powerpc-microprocessor-family-the-programming-environments-for-32-e3087633.html
Page 63 in table 2-4 is where the description of this bit can be found.
Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| target/ppc/fpu_helper.c | diffblobblamehistory |