| commit | 98d207cf9c232e6ac451b2aba24baa007956f578 | |
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Fri, 13 Aug 2021 10:37:12 +0000 (13 12:37 +0200) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Wed, 25 Aug 2021 11:02:14 +0000 (25 13:02 +0200) | ||
| tree | 8f31d442112fc7ae0095553edb0199c5aaab8ca4 | treesnapshot (tar.gz zip) |
| parent | bf7720024c62c9e2707b11aa7fe178be691b2f35 | commitdiff |
target/mips: Document Loongson-3A CPU definitions
Document the cores on which each Loongson-3A CPU is based (see
commit af868995e1b, "target/mips: Add Loongson-3 CPU definition").
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Message-Id: <20210813110149.1432692-2-f4bug@amsat.org>
Document the cores on which each Loongson-3A CPU is based (see
commit af868995e1b, "target/mips: Add Loongson-3 CPU definition").
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Message-Id: <20210813110149.1432692-2-f4bug@amsat.org>
| target/mips/cpu-defs.c.inc | diffblobblamehistory |