| commit | 956d272eb2996e4d95f8a674256f8a63a0c1e8d4 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 31 Jan 2014 14:47:37 +0000 (31 14:47 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 31 Jan 2014 14:47:37 +0000 (31 14:47 +0000) | ||
| tree | 1adc9d39bb4a0a73cc8e63b40eb69bc6ac636577 | treesnapshot (tar.gz zip) |
| parent | e1cea1144aff6498ddbcd60e2bff4172869b10d4 | commitdiff |
target-arm: A64: Add logic ops from SIMD 3 same group
Add support for the logical operations (ORR, AND, BIC, ORN, EOR, BSL,
BIT and BIF) from the SIMD 3 register same group (C3.6.16).
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Add support for the logical operations (ORR, AND, BIC, ORN, EOR, BSL,
BIT and BIF) from the SIMD 3 register same group (C3.6.16).
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
| target-arm/translate-a64.c | diffblobblamehistory |