| commit | 9456c2fbcd82dd82328ac6e7602a815582b1043e | |
| author | Leon Alrae <leon.alrae@imgtec.com> | |
| Mon, 7 Jul 2014 10:24:00 +0000 (7 11:24 +0100) | ||
| committer | Leon Alrae <leon.alrae@imgtec.com> | |
| Mon, 3 Nov 2014 11:48:34 +0000 (3 11:48 +0000) | ||
| tree | 7a2f9f2763b0945ec990ae22f3847476f89c5de5 | treesnapshot (tar.gz zip) |
| parent | 92ceb440d47b9ef3ba860cdc75a7e31563a7dc0c | commitdiff |
target-mips: add TLBINV support
For Standard TLB configuration (Config.MT=1):
TLBINV invalidates a set of TLB entries based on ASID. The virtual address is
ignored in the entry match. TLB entries which have their G bit set to 1 are not
modified.
TLBINVF causes all entries to be invalidated.
Single TLB entry can be marked as invalid on TLB entry write by having
EntryHi.EHINV set to 1.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
For Standard TLB configuration (Config.MT=1):
TLBINV invalidates a set of TLB entries based on ASID. The virtual address is
ignored in the entry match. TLB entries which have their G bit set to 1 are not
modified.
TLBINVF causes all entries to be invalidated.
Single TLB entry can be marked as invalid on TLB entry write by having
EntryHi.EHINV set to 1.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>