| commit | 91117bc546b10aeefd6d78502d82df5729f5f780 | |
| author | Paul Brook <paul@nowt.org> | |
| Sun, 24 Apr 2022 22:02:03 +0000 (24 23:02 +0100) | ||
| committer | Paolo Bonzini <pbonzini@redhat.com> | |
| Thu, 1 Sep 2022 18:16:33 +0000 (1 20:16 +0200) | ||
| tree | d87de82d96503e4ce15b65f8be4548a1be18f633 | treesnapshot (tar.gz zip) |
| parent | bf30ad8cefeb3b199f5485c5d78f2801cd248264 | commitdiff |
tests/tcg: i386: add SSE tests
Tests for correct operation of most x86-64 SSE instructions.
It should cover all combinations of overlapping register and memory
operands on a set of random-ish data.
Results are bit-identical to an Intel i5-8500, with the exception of
the RCPSS and RSQRT approximations where the real CPU gives less accurate
results (the Intel spec allows relative errors up to 1.5 * 2^-12)
Signed-off-by: Paul Brook <paul@nowt.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220424220204.2493824-42-paul@nowt.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Tests for correct operation of most x86-64 SSE instructions.
It should cover all combinations of overlapping register and memory
operands on a set of random-ish data.
Results are bit-identical to an Intel i5-8500, with the exception of
the RCPSS and RSQRT approximations where the real CPU gives less accurate
results (the Intel spec allows relative errors up to 1.5 * 2^-12)
Signed-off-by: Paul Brook <paul@nowt.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220424220204.2493824-42-paul@nowt.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| tests/tcg/Makefile.target | diffblobblamehistory | |
| tests/tcg/i386/Makefile.target | diffblobblamehistory | |
| tests/tcg/i386/README | diffblobblamehistory | |
| tests/tcg/i386/test-avx.c | [new file with mode: 0644] | blob |
| tests/tcg/i386/test-avx.py | [new file with mode: 0755] | blob |
| tests/tcg/i386/x86.csv | [new file with mode: 0644] | blob |
| tests/tcg/x86_64/Makefile.target | diffblobblamehistory |