| commit | 8a94cfb05ea9a8991c832236b4174d354025a7b7 | |
| author | Anton Blanchard <anton@samba.org> | |
| Tue, 11 Jun 2013 11:19:35 +0000 (11 21:19 +1000) | ||
| committer | Richard Henderson <rth@twiddle.net> | |
| Mon, 17 Jun 2013 17:41:52 +0000 (17 10:41 -0700) | ||
| tree | 2d0a4602dbb5c02e55a21baa937d6152a8c11d41 | treesnapshot (tar.gz zip) |
| parent | 38aea177d93556aada7c4c7aa530f0050715e293 | commitdiff |
tcg-ppc64: Fix RLDCL opcode
The rldcl instruction doesn't have an sh field, so the minor opcode
is shifted 1 bit. We were using the XO30 macro which shifted the
minor opcode 2 bits.
Remove XO30 and add MD30 and MDS30 macros which match the
Power ISA categories.
Cc: qemu-stable@nongnu.org
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
The rldcl instruction doesn't have an sh field, so the minor opcode
is shifted 1 bit. We were using the XO30 macro which shifted the
minor opcode 2 bits.
Remove XO30 and add MD30 and MDS30 macros which match the
Power ISA categories.
Cc: qemu-stable@nongnu.org
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
| tcg/ppc64/tcg-target.c | diffblobblamehistory |