| commit | 8a805609d126ff2be9ad9ec118185dfc52633d6f | |
| author | Huacai Chen <zltjiangshi@gmail.com> | |
| Wed, 28 Oct 2020 04:18:00 +0000 (28 12:18 +0800) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Tue, 3 Nov 2020 15:51:13 +0000 (3 16:51 +0100) | ||
| tree | 2ea63f61aaaa9fd660da9913f10e1e18e1377002 | treesnapshot (tar.gz zip) |
| parent | 89975214e684acb2767d28884610194b96640a12 | commitdiff |
target/mips: Add unaligned access support for MIPS64R6 and Loongson-3
MIPSR6 (not only MIPS32R6) processors support unaligned access in
hardware, so set MO_UNALN in their default_tcg_memop_mask. Btw, new
Loongson-3 (such as Loongson-3A4000) also support unaligned access,
since both old and new Loongson-3 use the same binaries, we can simply
set MO_UNALN for all Loongson-3 processors.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1604053541-27822-3-git-send-email-chenhc@lemote.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
MIPSR6 (not only MIPS32R6) processors support unaligned access in
hardware, so set MO_UNALN in their default_tcg_memop_mask. Btw, new
Loongson-3 (such as Loongson-3A4000) also support unaligned access,
since both old and new Loongson-3 use the same binaries, we can simply
set MO_UNALN for all Loongson-3 processors.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1604053541-27822-3-git-send-email-chenhc@lemote.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
| target/mips/translate.c | diffblobblamehistory |