hw/intc/arm_gicv3: Fix APxR<n> register dispatching
commit887aae10f6150dfdc71c45d7588e8efe6c144019
authorJan Kiszka <jan.kiszka@siemens.com>
Thu, 31 May 2018 13:50:51 +0000 (31 14:50 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 31 May 2018 13:50:51 +0000 (31 14:50 +0100)
tree76d9ed30e1af065d9df35cccb659b4e676997c12
parent0d4a7551d9f14b8ad50adb412cbd9e88dbfa20d0
hw/intc/arm_gicv3: Fix APxR<n> register dispatching

There was a nasty flip in identifying which register group an access is
targeting. The issue caused spuriously raised priorities of the guest
when handing CPUs over in the Jailhouse hypervisor.

Cc: qemu-stable@nongnu.org
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-id: 28b927d3-da58-bce4-cc13-bfec7f9b1cb9@siemens.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/intc/arm_gicv3_cpuif.c