| commit | 84d2e3e2ae76fdb0c8f3063fa8c46c8ce14ab201 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 29 Apr 2019 16:35:58 +0000 (29 17:35 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 29 Apr 2019 16:35:58 +0000 (29 17:35 +0100) | ||
| tree | 0ccca40492c0c20a79d9fe26124fd7223374a045 | treesnapshot (tar.gz zip) |
| parent | 5bcf8ed9401e62c73158ba110864ee1375558bf7 | commitdiff |
hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registers
For M-profile the MVFR* ID registers are memory mapped, in the
range we implement via the NVIC. Allow them to be read.
(If the CPU has no FPU, these registers are defined to be RAZ.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190416125744.27770-3-peter.maydell@linaro.org
For M-profile the MVFR* ID registers are memory mapped, in the
range we implement via the NVIC. Allow them to be read.
(If the CPU has no FPU, these registers are defined to be RAZ.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190416125744.27770-3-peter.maydell@linaro.org
| hw/intc/armv7m_nvic.c | diffblobblamehistory |