| commit | 828066c78a02a98bc395d125002b2d7a888285bb | |
| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | |
| Fri, 19 Feb 2016 13:43:46 +0000 (19 14:43 +0100) | ||
| committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | |
| Thu, 25 Feb 2016 11:54:50 +0000 (25 12:54 +0100) | ||
| tree | 202b2a9afd99d652b0349d71feabf815f7921b0c | treesnapshot (tar.gz zip) |
| parent | f678f671ba654d4610f0e43d175c8c1b2fad10df | commitdiff |
target-tricore: add opd trap generation
If an instruction uses a 64 bit register which consists of an even-odd pair
of 32 bit registers and if the register specifier in the instruction is
odd an opd trap is raised.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1455889426-1923-5-git-send-email-kbastian@mail.uni-paderborn.de>
If an instruction uses a 64 bit register which consists of an even-odd pair
of 32 bit registers and if the register specifier in the instruction is
odd an opd trap is raised.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1455889426-1923-5-git-send-email-kbastian@mail.uni-paderborn.de>
| target-tricore/translate.c | diffblobblamehistory |