| commit | 8085ce63c5967d200f1241b6c0a189371993c5df | |
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | |
| Mon, 15 Jun 2015 17:06:10 +0000 (15 18:06 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 15 Jun 2015 17:06:10 +0000 (15 18:06 +0100) | ||
| tree | bedaaf4ccbc88fdf91e1455c63385a616f2a447d | treesnapshot (tar.gz zip) |
| parent | 62b44f059a84d1ac580a653fc4110dfabaef6b83 | commitdiff |
arm: Do not define TLBTR in PMSA systems
If doing a PMSA (MPU) system do not define the VMSA specific TLBTR CP.
The def is done separately from VMSA registers group as it is affected
by both the OMAP/STRONGARM RW errata and the MIDR backgrounding.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: b03fea3840207edf633f5c9189400c3dd6a28d14.1434066412.git.peter.crosthwaite@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
If doing a PMSA (MPU) system do not define the VMSA specific TLBTR CP.
The def is done separately from VMSA registers group as it is affected
by both the OMAP/STRONGARM RW errata and the MIDR backgrounding.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: b03fea3840207edf633f5c9189400c3dd6a28d14.1434066412.git.peter.crosthwaite@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target-arm/helper.c | diffblobblamehistory |