| commit | 7f5d6517e303e39d79f57ca92919725e03c9fad8 | |
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | |
| Wed, 13 Jun 2018 08:30:13 +0000 (13 09:30 +0100) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Sat, 16 Jun 2018 06:32:33 +0000 (16 16:32 +1000) | ||
| tree | e8c6b481f87c7a94e3aff2333112b53f1ca4a1c5 | treesnapshot (tar.gz zip) |
| parent | 52b438815ecc1cb799d943ef4fd710fe67cc7702 | commitdiff |
mos6522: only clear the shift register interrupt upon write
According to the 6522 datasheet the shift register (SR) interrupt flag is
cleared upon write with no mention of any other interrupt flags.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
According to the 6522 datasheet the shift register (SR) interrupt flag is
cleared upon write with no mention of any other interrupt flags.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| hw/misc/mos6522.c | diffblobblamehistory |