target/arm: Suppress more TCG unimplemented features in ID registers
commit7d8c283e10dd818457e7c6a0f729fb03857253ac
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 4 Jul 2023 13:06:46 +0000 (4 14:06 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 6 Jul 2023 12:28:08 +0000 (6 13:28 +0100)
tree49c85f17a7871de50dacb22a9f14dc124dc7d0ba
parentad18376b90c8101b8eed2fd571bdbb94636ccc2e
target/arm: Suppress more TCG unimplemented features in ID registers

We already squash the ID register field for FEAT_SPE (the Statistical
Profiling Extension) because TCG does not implement it and if we
advertise it to the guest the guest will crash trying to look at
non-existent system registers.  Do the same for some other features
which a real hardware Neoverse-V1 implements but which TCG doesn't:
 * FEAT_TRF (Self-hosted Trace Extension)
 * Trace Macrocell system register access
 * Memory mapped trace
 * FEAT_AMU (Activity Monitors Extension)
 * FEAT_MPAM (Memory Partitioning and Monitoring Extension)
 * FEAT_NV (Nested Virtualization)

Most of these, like FEAT_SPE, are "introspection/trace" type features
which QEMU is unlikely to ever implement.  The odd-one-out here is
FEAT_NV -- we could implement that and at some point we probably
will.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230704130647.2842917-2-peter.maydell@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
target/arm/cpu.c