target/arm: Trap non-streaming usage when Streaming SVE is active
commit75fe83564a2e41ac4bfcee72b1d9a590ddd46ebe
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 8 Jul 2022 15:14:58 +0000 (8 20:44 +0530)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 11 Jul 2022 12:19:35 +0000 (11 13:19 +0100)
tree4e3f50a66066442f92b4cc8dbebcfa2285875436
parente67cd1cac26181873496e5fb2464dbeb038e0fcd
target/arm: Trap non-streaming usage when Streaming SVE is active

This new behaviour is in the ARM pseudocode function
AArch64.CheckFPAdvSIMDEnabled, which applies to AArch32
via AArch32.CheckAdvSIMDOrFPEnabled when the EL to which
the trap would be delivered is in AArch64 mode.

Given that ARMv9 drops support for AArch32 outside EL0, the trap EL
detection ought to be trivially true, but the pseudocode still contains
a number of conditions, and QEMU has not yet committed to dropping A32
support for EL[12] when v9 features are present.

Since the computation of SME_TRAP_NONSTREAMING is necessarily different
for the two modes, we might as well preserve bits within TBFLAG_ANY and
allocate separate bits within TBFLAG_A32 and TBFLAG_A64 instead.

Note that DDI0616A.a has typos for bits [22:21] of LD1RO in the table
of instructions illegal in streaming mode.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220708151540.18136-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h
target/arm/helper.c
target/arm/meson.build
target/arm/sme-fa64.decode [new file with mode: 0644]
target/arm/translate-a64.c
target/arm/translate-vfp.c
target/arm/translate.c
target/arm/translate.h