| commit | 75fb4577fc1b7ae87cb7842aa7fe59ae4de5e95e | |
| author | Joel Stanley <joel@jms.id.au> | |
| Mon, 1 Jul 2019 16:26:16 +0000 (1 17:26 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 1 Jul 2019 16:28:59 +0000 (1 17:28 +0100) | ||
| tree | b16c4f9dbe00b3cde1d722c05675e739c16022a0 | treesnapshot (tar.gz zip) |
| parent | 979672cf51533ac629b925fea096eb6bfe25261a | commitdiff |
hw/arm/aspeed: Add RTC to SoC
All systems have an RTC.
The IRQ is hooked up but the model does not use it at this stage. There
is no guest code that uses it, so this limitation is acceptable.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190618165311.27066-5-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
All systems have an RTC.
The IRQ is hooked up but the model does not use it at this stage. There
is no guest code that uses it, so this limitation is acceptable.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190618165311.27066-5-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/arm/aspeed_soc.c | diffblobblamehistory | |
| include/hw/arm/aspeed_soc.h | diffblobblamehistory |