| commit | 727d937b59f1f722f983e20f9cd23b0e7ef60165 | |
| author | Laurent Vivier <laurent@vivier.eu> | |
| Fri, 13 Jan 2017 18:36:33 +0000 (13 19:36 +0100) | ||
| committer | Laurent Vivier <laurent@vivier.eu> | |
| Sat, 14 Jan 2017 09:06:21 +0000 (14 10:06 +0100) | ||
| tree | 55e45a46b3a565b37798f8374c6cb763d3c2fb33 | treesnapshot (tar.gz zip) |
| parent | b19578f42872aefef891e5804359af8d935a5487 | commitdiff |
target-m68k: increment/decrement with SP
On 680x0 family only.
Address Register indirect With postincrement:
When using the stack pointer (A7) with byte size data, the register
is incremented by two.
Address Register indirect With predecrement:
When using the stack pointer (A7) with byte size data, the register
is decremented by two.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1484332593-16782-6-git-send-email-laurent@vivier.eu>
On 680x0 family only.
Address Register indirect With postincrement:
When using the stack pointer (A7) with byte size data, the register
is incremented by two.
Address Register indirect With predecrement:
When using the stack pointer (A7) with byte size data, the register
is decremented by two.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1484332593-16782-6-git-send-email-laurent@vivier.eu>
| target/m68k/translate.c | diffblobblamehistory |