| commit | 6f218d6e994bd8b229d6522899b6ac6cd98bdb47 | |
| author | Paul Brook <paul@nowt.org> | |
| Sun, 24 Apr 2022 22:01:38 +0000 (24 23:01 +0100) | ||
| committer | Paolo Bonzini <pbonzini@redhat.com> | |
| Thu, 1 Sep 2022 18:16:33 +0000 (1 20:16 +0200) | ||
| tree | 1a8808fd1d1fe9acd815a462cc7d96fb45fa90bf | treesnapshot (tar.gz zip) |
| parent | cbf4ad5498039105db7c41e16e116b5b6584a786 | commitdiff |
target/i386: Dot product AVX helper prep
Make the dpps and dppd helpers AVX-ready
I can't see any obvious reason why dppd shouldn't work on 256 bit ymm
registers, but both AMD and Intel agree that it's xmm only.
Signed-off-by: Paul Brook <paul@nowt.org>
Message-Id: <20220424220204.2493824-17-paul@nowt.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Make the dpps and dppd helpers AVX-ready
I can't see any obvious reason why dppd shouldn't work on 256 bit ymm
registers, but both AMD and Intel agree that it's xmm only.
Signed-off-by: Paul Brook <paul@nowt.org>
Message-Id: <20220424220204.2493824-17-paul@nowt.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| target/i386/ops_sse.h | diffblobblamehistory |