| commit | 6d0ed6ba6c1aa0201326d4f0072e91983495bb52 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 20 Aug 2018 10:24:33 +0000 (20 11:24 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 20 Aug 2018 10:24:33 +0000 (20 11:24 +0100) | ||
| tree | 2b39b3812362f49728b6b6c85448eb705f6e09b9 | treesnapshot (tar.gz zip) |
| parent | aa74e355f12438888eacdd8f3c2fc910b1b621a7 | commitdiff |
hw/dma/pl080: Support all three interrupt lines
The PL080 and PL081 have three outgoing interrupt lines:
* DMACINTERR signals DMA errors
* DMACINTTC is the DMA count interrupt
* DMACINTR is a combined interrupt, the logical OR of the other two
We currently only implement DMACINTR, because that's all the
realview and versatile boards needed, but the instances of the
PL081 in the MPS2 firmware images use all three interrupt lines.
Implement the missing DMACINTERR and DMACINTTC.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
The PL080 and PL081 have three outgoing interrupt lines:
* DMACINTERR signals DMA errors
* DMACINTTC is the DMA count interrupt
* DMACINTR is a combined interrupt, the logical OR of the other two
We currently only implement DMACINTR, because that's all the
realview and versatile boards needed, but the instances of the
PL081 in the MPS2 firmware images use all three interrupt lines.
Implement the missing DMACINTERR and DMACINTTC.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
| hw/dma/pl080.c | diffblobblamehistory | |
| include/hw/dma/pl080.h | diffblobblamehistory |