riscv: Add semihosting support for user mode
commit6b80cb25b4165ae2afa525d084366221a2e9b58d
authorKito Cheng <kito.cheng@sifive.com>
Fri, 8 Jan 2021 22:42:53 +0000 (8 22:42 +0000)
committerAlex Bennée <alex.bennee@linaro.org>
Mon, 18 Jan 2021 10:05:06 +0000 (18 10:05 +0000)
treea47658827d26826f03bf547ff9bb7d9d514df35b
parenta10b9d93ecea0a8f01eb6de56274b1bcb101083b
riscv: Add semihosting support for user mode

This could made testing more easier and ARM/AArch64 has supported on
their linux user mode too, so I think it should be reasonable.

Verified GCC testsuite with newlib/semihosting.

Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210107170717.2098982-7-keithp@keithp.com>
Message-Id: <20210108224256.2321-18-alex.bennee@linaro.org>
linux-user/riscv/cpu_loop.c