mem/cxl_type3: Add read and write functions for associated hostmem.
commit5fcc499ee3457709657b23655e385613a437068d
authorJonathan Cameron <jonathan.cameron@huawei.com>
Fri, 29 Apr 2022 14:40:57 +0000 (29 15:40 +0100)
committerMichael S. Tsirkin <mst@redhat.com>
Fri, 13 May 2022 11:57:26 +0000 (13 07:57 -0400)
tree6040284acaff2efd665fdeb635821b887f071b75
parent0b4aec246972f238a22d04403289eee97e8c8be6
mem/cxl_type3: Add read and write functions for associated hostmem.

Once a read or write reaches a CXL type 3 device, the HDM decoders
on the device are used to establish the Device Physical Address
which should be accessed.  These functions peform the required maths
and then use a device specific address space to access the
hostmem->mr to fullfil the actual operation.  Note that failed writes
are silent, but failed reads return poison.  Note this is based
loosely on:

https://lore.kernel.org/qemu-devel/20200817161853.593247-6-f4bug@amsat.org/
[RFC PATCH 0/9] hw/misc: Add support for interleaved memory accesses

Only lightly tested so far.  More complex test cases yet to be written.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220429144110.25167-33-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
hw/mem/cxl_type3.c
include/hw/cxl/cxl_device.h