| commit | 5b620fb698e69a5386f2f02c7c455bdbdd59a52b | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Wed, 22 Jun 2011 14:16:32 +0000 (22 15:16 +0100) | ||
| committer | Blue Swirl <blauwirbel@gmail.com> | |
| Tue, 12 Jul 2011 20:29:46 +0000 (12 20:29 +0000) | ||
| tree | e456eca4760bd7136a5c0170f6c6e210e8fbc864 | treesnapshot (tar.gz zip) |
| parent | a884da8a06806d55fa83c8011bb17d6838583f9b | commitdiff |
exec-all.h: Make MAX_OP_PER_INSTR large enough for target-arm's uses
The target-arm frontend's worst-case TCG ops per instr is 194 (and in
general many of the "load multiple registers" ARM instructions generate
more than 100 TCG ops). Raise MAX_OP_PER_INSTR accordingly to avoid
possible buffer overruns.
Since it doesn't make any sense for the "64 bit guest on 32 bit host"
case to have a smaller limit than the normal case, we collapse the
two cases back into each other again.
(This increase costs us about 14K in extra static buffer space and
21K of extra margin at the end of a 32MB codegen buffer.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
The target-arm frontend's worst-case TCG ops per instr is 194 (and in
general many of the "load multiple registers" ARM instructions generate
more than 100 TCG ops). Raise MAX_OP_PER_INSTR accordingly to avoid
possible buffer overruns.
Since it doesn't make any sense for the "64 bit guest on 32 bit host"
case to have a smaller limit than the normal case, we collapse the
two cases back into each other again.
(This increase costs us about 14K in extra static buffer space and
21K of extra margin at the end of a 32MB codegen buffer.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| exec-all.h | diffblobblamehistory |