| commit | 597d6bb3e8a93c4c0670df93f07c321ae84d2930 | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Tue, 29 Jan 2019 11:46:05 +0000 (29 11:46 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 29 Jan 2019 11:46:05 +0000 (29 11:46 +0000) | ||
| tree | 9805fce96bf95bc0eab98c975b2a18f939890152 | treesnapshot (tar.gz zip) |
| parent | b617ca9223353624000017e2fa499d6d3296b293 | commitdiff |
aspeed/smc: define registers for all possible CS
The model should expose one control register per possible CS. When
testing the validity of the register number in the read operation,
replace 's->num_cs' by 'ctrl->max_slaves' which represents the maximum
number of flash devices a controller can handle.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190124140519.13838-3-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The model should expose one control register per possible CS. When
testing the validity of the register number in the read operation,
replace 's->num_cs' by 'ctrl->max_slaves' which represents the maximum
number of flash devices a controller can handle.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190124140519.13838-3-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/ssi/aspeed_smc.c | diffblobblamehistory |