| commit | 5258c2a69ce6cea0b9ab90f1c83223c0daa8d72c | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Wed, 4 Sep 2019 07:05:03 +0000 (4 09:05 +0200) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 13 Sep 2019 15:05:01 +0000 (13 16:05 +0100) | ||
| tree | d5eedd02673f3b18f37f8247b2dcd262adbff7b8 | treesnapshot (tar.gz zip) |
| parent | 0d72c717029f59fa0531fee419734ad7f14b1331 | commitdiff |
aspeed/smc: Inject errors in DMA checksum
Emulate read errors in the DMA Checksum Register for high frequencies
and optimistic settings of the Read Timing Compensation Register. This
will help in tuning the SPI timing calibration algorithm. Errors are
only injected when the property "inject_failure" is set to true as
suggested by Philippe.
The values below are those to expect from the first flash device of
the FMC controller of a palmetto-bmc machine.
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190904070506.1052-8-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Emulate read errors in the DMA Checksum Register for high frequencies
and optimistic settings of the Read Timing Compensation Register. This
will help in tuning the SPI timing calibration algorithm. Errors are
only injected when the property "inject_failure" is set to true as
suggested by Philippe.
The values below are those to expect from the first flash device of
the FMC controller of a palmetto-bmc machine.
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190904070506.1052-8-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/ssi/aspeed_smc.c | diffblobblamehistory | |
| include/hw/ssi/aspeed_smc.h | diffblobblamehistory |