| commit | 502960ca04c15cc7e24f3e8f9e0d8070bc3d77d7 | |
| author | Luc Michel <luc@lmichel.fr> | |
| Sat, 10 Oct 2020 13:57:56 +0000 (10 15:57 +0200) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 27 Oct 2020 11:10:44 +0000 (27 11:10 +0000) | ||
| tree | db3f113ffa05bf1b95d691fa67c1d1eebf805dc0 | treesnapshot (tar.gz zip) |
| parent | fc9840850ba0eb3e61c81894bff3df12b0534497 | commitdiff |
hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer
This simple mux sits between the PLL channels and the DSI0E and DSI0P
clock muxes. This mux selects between PLLA-DSI0 and PLLD-DSI0 channel
and outputs the selected signal to source number 4 of DSI0E/P clock
muxes. It is controlled by the cm_dsi0hsck register.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This simple mux sits between the PLL channels and the DSI0E and DSI0P
clock muxes. This mux selects between PLLA-DSI0 and PLLD-DSI0 channel
and outputs the selected signal to source number 4 of DSI0E/P clock
muxes. It is controlled by the cm_dsi0hsck register.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/misc/bcm2835_cprman.c | diffblobblamehistory | |
| include/hw/misc/bcm2835_cprman.h | diffblobblamehistory | |
| include/hw/misc/bcm2835_cprman_internals.h | diffblobblamehistory |