| commit | 4b9774ef482d789d27938d0a7c14936ad706c74f | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 16 Jan 2018 13:28:09 +0000 (16 13:28 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 16 Jan 2018 13:28:09 +0000 (16 13:28 +0000) | ||
| tree | 8dd57948508225642cf1593137262a3b6d65fbe5 | treesnapshot (tar.gz zip) |
| parent | f521eeee3bd060b460c99e605472b7e03967db43 | commitdiff |
hw/intc/armv7m: Support byte and halfword accesses to CFSR
The Configurable Fault Status Register for ARMv7M and v8M is
supposed to be byte and halfword accessible, but we were only
implementing word accesses. Add support for the other access
sizes, which are used by the Zephyr RTOS.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1512742372-31517-1-git-send-email-peter.maydell@linaro.org
The Configurable Fault Status Register for ARMv7M and v8M is
supposed to be byte and halfword accessible, but we were only
implementing word accesses. Add support for the other access
sizes, which are used by the Zephyr RTOS.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1512742372-31517-1-git-send-email-peter.maydell@linaro.org
| hw/intc/armv7m_nvic.c | diffblobblamehistory |