Merge remote-tracking branch 'remotes/riscv/tags/riscv-qemu-2.12-important-fixes...
commit47d3b60858d90ac8a0cc3a72af7f95c96781125a
authorPeter Maydell <peter.maydell@linaro.org>
Wed, 28 Mar 2018 21:13:38 +0000 (28 22:13 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 28 Mar 2018 21:13:38 +0000 (28 22:13 +0100)
tree463c9021e0e1f31340ac34b700429a7f4daa059c
parent043289bef4d9c0d277c45695c676a6cc9fca48a0
parent33b4f859f1e1ea6722d10c3e9c0e3d85afb44ff4
Merge remote-tracking branch 'remotes/riscv/tags/riscv-qemu-2.12-important-fixes' into staging

RISC-V: Important fixes for QEMU 2.12

This series includes changes that are considered important.
i.e. correct user-visible bugs that are exercised by common
operations such as -cpu list (CPU model changes) or -d in_asm
(fix for disassembly of addiw)

# gpg: Signature made Wed 28 Mar 2018 21:34:57 BST
# gpg:                using DSA key 6BF1D7B357EF3E4F
# gpg: Good signature from "Michael Clark <michaeljclark@mac.com>"
# gpg:                 aka "Michael Clark <mjc@sifive.com>"
# gpg:                 aka "Michael Clark <michael@metaparadigm.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7C99 930E B17C D8BA 073D  5EFA 6BF1 D7B3 57EF 3E4F

* remotes/riscv/tags/riscv-qemu-2.12-important-fixes:
  RISC-V: Fix incorrect disassembly for addiw
  RISC-V: Convert cpu definition to future model

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>