| commit | 4594fa5a96d07a5087df4437aed68dbe0136ca08 | |
| author | LIU Zhiwei <zhiwei_liu@c-sky.com> | |
| Fri, 10 Dec 2021 07:55:55 +0000 (10 15:55 +0800) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Mon, 20 Dec 2021 04:51:36 +0000 (20 14:51 +1000) | ||
| tree | b5f8385c22cfa61db2501b6aff315b2409e1bf7b | treesnapshot (tar.gz zip) |
| parent | 9bd291f6e3f8cccca73b58039744f926eb4ac457 | commitdiff |
target/riscv: rvv-1.0: add vcsr register
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-10-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-10-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| target/riscv/cpu_bits.h | diffblobblamehistory | |
| target/riscv/csr.c | diffblobblamehistory |